CVE-2024-24853

Incorrect behavior order in transition between executive monitor and SMI transfer monitor (STM) in some Intel(R) Processor may allow a privileged user to potentially enable escalation of privilege via local access.

Score

CVSS 4.0 7.3 High

Status

Deferred - secure@intel.com

Published

2024-08-14

Last modified

2024-08-16

Weaknesses

CWE-696

Affected products

• Processor (Intel)

References

• https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01083.html